Pulsed Capacitance Technique for Evaluation of Barrier Structures - Juozas-vidmantis Vaitkus - 書籍 - LAP LAMBERT Academic Publishing - 9783659505188 - 2013年12月4日
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Pulsed Capacitance Technique for Evaluation of Barrier Structures

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Traditional semiconductor device characterization techniques based on capacitance measurements using a small test signal, the different modifications of deep level transient spectroscopy etc. are limited if devices contain a large density of deep traps, exhibiting enhanced generation currents. In this book, a pulsed capacitance technique for barrier evaluation by linearly increasing voltage (BELIV) is presented. The basics of analysis of the current transients for reverse and forward biased junctions are described. The measurement schemes and regimes for profiling of dopant distribution, for thermo-emission and photo-ionization spectroscopy of traps, for the in situ control of radiation damage of particle detectors are discussed. Applications of this BELIV technique for characterization of multi-layered structures of homo- and hetero- junctions formed in fabrication of diode, particle detector, thyristor and solar-cell devices are demonstrated. The BELIV technique is shown to be a powerful tool for fast and comprehensive evaluation of the parameters of barrier structures.

メディア 書籍     Paperback Book   (ソフトカバーで背表紙を接着した本)
リリース済み 2013年12月4日
ISBN13 9783659505188
出版社 LAP LAMBERT Academic Publishing
ページ数 84
寸法 150 × 5 × 226 mm   ·   143 g
言語 ドイツ語