A Custom Digital Implementation of Ic Sn74ls682 Using Cadence Tools - Alisha Mahapatro - 書籍 - LAP LAMBERT Academic Publishing - 9783659307089 - 2013年2月16日
カバー画像とタイトルが一致しない場合、正しいのはタイトルです

A Custom Digital Implementation of Ic Sn74ls682 Using Cadence Tools

価格
¥ 26.978
税抜

遠隔倉庫からの取り寄せ

発送予定日 年10月23日 - 年11月4日
Alisha Mahapatro の新しいリリースのお知らせを受け取る
iMusicのウィッシュリストに追加

まだ評価がありません

All engineering is based on science as academic establishments quite rightly emphasize. However, it is essential that the science which is taught is relevant to current practice and technology in engineering. In today?s era of modern technology where everyone looks upon specialization in every field, we too have come up with a design which can be used for a specific application. The IC whose functionality we have implemented in this work is a comparator. We have designed the schematic and layout of the IC using CADENCE back end tools like Virtuoso Schematic XL, Virtuoso Layout XL, Assura and Spectre. A compact, good and cost benefit high performance ratio comparator plays an important role in almost all hardware sorters. Digital magnitude comparators find usage in various applications. Digital comparators are used widely in Analogue to Digital converters and Arithmetic Logic Circuits for performing various arithmetic operations. They also find a wide range of application in CPUs and Micro Controllers.

メディア 書籍     Paperback Book   (ソフトカバーで背表紙を接着した本)
リリース済み 2013年2月16日
ISBN13 9783659307089
出版社 LAP LAMBERT Academic Publishing
ページ数 108
寸法 150 × 7 × 226 mm   ·   179 g
言語 ドイツ語