Signal Integrity In Mother Board - Interconnect Theory and Design - Rajeswari Packianathan - 書籍 - LAP LAMBERT Academic Publishing - 9783330330931 - 2017年6月19日
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Signal Integrity In Mother Board - Interconnect Theory and Design

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発送予定日 年12月22日 - 2026年1月1日
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The tremendous growth of wireless technologies and semiconductor technology lead to smaller feature size, higher frequency of operation and faster speed. Therefore more signal lines of circuits or components are placed in a constrained space of printed circuit board. The close proximity of signal lines cause electromagnetic coupling. This electromagnetic coupling leads to signal integrity problems such as crosstalk and crosstalk induced jitter. Signal integrity is a major concern to measure the quality of signal. It can be minimized by the proper design of signal lines or interconnect lines. This book mainly focuses on interconnect design to reduce crosstalk. The analysis and design of this interconnect structure helps to printed circuit board designers and manufacturers for proper function of printed circuit board for high speed applications.

メディア 書籍     Paperback Book   (ソフトカバーで背表紙を接着した本)
リリース済み 2017年6月19日
ISBN13 9783330330931
出版社 LAP LAMBERT Academic Publishing
ページ数 72
寸法 152 × 229 × 4 mm   ·   117 g
言語 英語