Mikhail Kovalev
A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science Mikhail Kovalev 2014 edition

Name: A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science
Price: 8927 JPY
Availability: OutOfStock
Author: Mikhail Kovalev

価格

¥ 8.927

税抜

遠隔倉庫からの取り寄せ

発送予定日年6月22日 - 年7月2日

お客様の声：

Top-vurdering på Google Reviews, baseret på tusinder af anmeldelser.

EU消費者保護法に基づく14日間の返品ポリシー

Trustpilotで高評価

iMusicのウィッシュリストに追加

A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science

Mikhail Kovalev

2014 edition

It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.

352 pages, 147 black & white illustrations, biography

メディア	書籍 Paperback Book (ソフトカバーで背表紙を接着した本)
リリース済み	2014年12月1日
ISBN13	9783319139050
出版社	Springer International Publishing AG
ページ数	352
寸法	155 × 235 × 19 mm · 508 g
言語	英語