CM Krishna

Performance Modeling for Computer Architects - Systems CM Krishna

Jacket Description/Back: As computers become more complex, the number and complexity of the tasks facing the computer architect also increase. Computer performance often depends on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity. Performance Modeling for Computer Architects introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. The book discusses the development of performance models based on queuing theory and probability. The text also shows how performance models are used to provide quick approximate calculations to indicate basic performance trade-offs and to narrow the range of parameters considered when determining system configurations. Performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what effect incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field is not required to understand the papers in this volume. Table of Contents: Preface. Computer Performance Evaluation Methodology. An Instruction Timing Model of CPU Performance. On Parallel Processing Systems: Amdahl's Law Generalized and Some Results on Optimal Design. The Nonuniform Distribution of Instruction-Level and Machine Parallelism and Its Effect on Performance. Classification and Performance Evaluation of Instruction Buffering Techniques. Characterization of Branch and Data Dependencies in Programs for Evaluating Pipeline Performance. Optimal Pipelining. Branch Strategies: Modeling and Optimization. Footprints in the Cache. An Analytical Cache Model. Modeling Live and Dead Lines in Cache Memory Systems. Optimal Partitioning of Cache Memory. An Accurate and Efficient Performance Analysis Technique for Multiprocessor Snooping Cache-Consistency Protocols. Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling. Analysis of Multiprocessors with Private Cache Memories. Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. Performance of Processor-Memory Interconnections for Multiprocessors. General Model for Memory Interference in Multiprocessors and Mean Value Analysis. Equilibrium Point Analysis of Memory Interference in Multiprocessor Systems. Scalar Memory References in Pipelined Multiprocessors: A Performance Study. Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor. Optimal Design of Multilevel Storage Hierarchies. Analysis of the Periodic Update Write Policy for Disk Cache. Models of DASD Subsystems with Multiple Access Paths: A Throughput-Driven Approach. Synchronized Disk Interleaving. Asynchronous Disk Interleaving: Approximating Access Delays. An Analytic Performance Model of Disk Arrays. About the Author.

Contributor Bio:  Krishna, C M Krishna, since 1984, has been a faculty member of the University of Massachusetts Department of Electrical and Computer Engineering at Amherst.